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| MATRA MHS HM 65728B 2K x 8 High Speed CMOS SRAM Description The HM 65728B is a high speed CMOSstatic RAM organized as 2048 x 8 bits. It is manufactured using MHS's high performance CMOS technology. Access times as fast as 25 ns are available with maximum power consumption of only 600 mW. The HM 65728B features fully static operation requiring no external clocks or timing strobes. The automatic power-down feature reduces the power consumption by 80 % when the circuit is deselected. Easy memory expansion is provided by an active low chip select (CS) and active low output enable (OE) and three state drivers. All inputs and outputs of the HM 65728 are TTL compatible and operate from single 5V supply thus simplifying system design. The HM 65728B is 100 % processed following the test methods of MIL STD 883 and/or ESA/SCC 9000 making it ideally suitable for military/space applications that demand superior levels of performance and reliability. Features D Fast Access Time Commercial : 25/35/45/55 ns (max) Military : 25/35/45/55 ns (max) D Low Power Consumption Active : 550 mW (max) Standby : 110 mW (max) D Wide Temperature Range : -55C to + 125C D D D D 300 and 600 Mils Width Package TTL Compatible Inputs and Outputs Asynchronous Capable of Withstanding Greater than 2000 V Electrostatic Discharge D Single 5 Volt Supply Interface Block Diagram Rev. C (16/08/95) 1 HM 65728B Pin Configuration Ceramic 300 mils, 24 pins, DIL Plastic 300 & 600 mils, 24 pins, DIL SOIC 300 mils, 24 pins LCC, 32 pins MATRA MHS Pinout DIL/SOIC 24 pins (top view) Pinout LCC 32 pins (top view) Logic Symbol Pin Names A0-A10: Address inputs I/O0-I/O7 Vcc Gnd : Input/Output : Power : Ground CS OE W : Chip Select : Output Enable : Write enable Truth Table CS H L L L OE X L H L W X H L L DATA-IN Z Z Valid Valid DATA-OUT Z Valid Z Z MODE Deselect Read Write Write 2 Rev. C (16/08/95) MATRA MHS HM 65728B Storage temperature : . . . . . . . . . . . . . . . . . . . . . . . . -65C to +150C Output current into outputs (low) : . . . . . . . . . . . . . . . . . . . . . . . 20 mA Electro Static Discharge Voltage . . . . . . . . . . . . . . . . . . . . . . > 2000 V (MIL STD 883 METHOD 3015.2) Electrical Characteristics Supply voltage to GND potential : . . . . . . . . . . . . . . . -0.5 V to +7.0 V DC input voltage : . . . . . . . . . . . . . . . . . . . . . . . . . . . -3.0 V to +7.0 V DC output voltage in high Z state : . . . . . . . . . . . . . . -0.5 V to +7.0 V Operating Range OPERATING VOLTAGE Military Automotive Industrial Commercial (- 2) -A (- 9) (- 5) 5 V 10 % 5 V 10 % 5 V 10 % 5 V 10 % OPERATING TEMPERATURE - 55_C to + 125_C - 40_C to + 125_C - 40_C to + 85_C 0_C to + 70_C Recommended DC Operating Conditions PARAMETER Vcc Gnd VIL VIH DESCRIPTION Supply Voltage Ground Input low voltage Input high voltage MINIMUM 4.5 0.0 - 0.3 2.2 TYPICAL 5.0 0.0 0.0 - MAXIMUM 5.5 0.0 0.8 5.5 UNIT V V V V Capacitance PARAMETER Cin Cout Note : (1) (1) DESCRIPTION Input capacitance Output capacitance MINIMUM - - TYPICAL - - MAXIMUM 5 7 UNIT pF pF 1. TA = 25C, f = 1 MHz, Vcc = 5.0 V, these parameters are not tested. DC Parameters PARAMETER IIX IOZ IOS VOL VOH Note : (3) (3) (4) (5) (2) DESCRIPTION Input leakage current Output leakage current Output short circuit current Output low voltage Output high voltage MINIMUM - 10.0 - 10.0 - - 2.4 TYPICAL - - - - - MAXIMUM 10.0 10.0 - 300.0 0.4 - UNIT A A mA V V 2. Gnd < Vin < Vcc, Gnd < Vout < Vcc Output disabled. 3. Vcc = max, Vout = Gnd, duration of the short circuit should not exceed 30 seconds. Not more than 1 output should be shorted at one time. 4. Vcc min, IOL = 8.0 mA. 5. Vcc min, IOH = -4.0 mA. Rev. C (16/08/95) 3 HM 65728B Consumption for Commercial (-5) Specification SYMBOL ICCSB ICCOP (6) (7) MATRA MHS PARAMETER Standby supply current Dynamic operating current 65728B H-5 20 100 65728B K-5 20 100 65728B M-5 20 100 65728B N-5 30 100 UNIT mA mA VALUE max max Consumption for Military (-2) Automotive (-A), Industrial (-9) Specification SYMBOL ICCSB ICCOP Note : (6) (7) PARAMETER Standby supply current Dynamic operating current 65728B H-2/A/9 40 120 65728B K-2/A/9 30 120 65728B M-2/A/9 30 120 65728B N-2/A/9 30 120 UNIT mA mA VALUE max max 6. CS VIH, a pull-up resistor to Vcc on the CS input is required to keep the device deselected during Vcc power-up otherwise ICCSB will exceed values above. 7. Vcc max, Output current = 0 mA, f = max, Vin = Vcc or Gnd. AC Parameters AC Conditions Input pulse levels : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gnd to 3.0 V Input rise : . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ns Input timing reference levels : . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 V Output loading IOL/IOH (see figure 1a and 1b) : . . . . . . . . . . . +30 pF AC Test Loads and Waveforms Figure 1 a Figure 1 b Figure 2 4 Rev. C (16/08/95) MATRA MHS Write Cycle : Commercial (-5) Specification SYMBOL TAVAV TAVWL TAVWH TDVWH TELWH TWLQZ(8) TWLWH TWHAX TWHDX TWHQX TEHAX Notes : (8, 9) HM 65728B PARAMETER Write cycle time Address set-up time Address valid to end of write Data set-up time CS low to write end Write low to high Z Write pulse width Address hold to end of write Data hold time Write high to low Z Address hold end CS 65728B H-5 25 0 20 15 20 10 20 2 0 3 3 65728B K-5 35 0 30 15 30 15 20 2 0 0 3 65728B M-5 45 0 40 20 40 15 20 2 0 0 3 65728B N-5 55 0 50 25 50 20 30 2 5 0 3 UNIT ns ns ns ns ns ns ns ns ns ns ns VALUE min min min min min max min min min min min 8. The data input set up and hold timing should be referenced to the rising edge of the signal that terminates the write. 9. At any given temperature and voltage condition, TWHQX is less than TWLQZ for all devices. These parameters are sampled and not 100 % tested. Write Cycle : Military (-2) Automotive (-A) Industrial (-9) Specification SYMBOL TAVAV TAVWL TAVWH TDVWH TELWH TWLQZ(8) TWLWH TWHAX TWHDX TEHAX PARAMETER Write Cycle time Address set-up time Address valid to end of write Data set-up time CS low to write end Write low to high Z Write pulse width Address hold to end of write Data hold time Address hold end CS 65728B H-2 25 0 20 15 20 10 20 2 5 3 65728B K-2 35 0 30 15 30 15 20 2 5 3 65728B M-2 45 0 40 20 40 15 25 2 5 3 65728B N-2 55 0 50 25 50 20 30 2 5 3 UNIT ns ns ns ns ns ns ns ns ns ns VALUE min min min min min max min min min min Rev. C (16/08/95) 5 HM 65728B Write Cycle 1 (W Controlled) MATRA MHS Write Cycle 2 (CS controlled) 6 Rev. C (16/08/95) MATRA MHS Read Cycle : Commercial (-5) Specification SYMBOL TAVAV TAVQV TAVQX TELQV TELQX TEHQZ TELIC TEHICL TGLQV TGLQX TGHQZ HM 65728B PARAMETER Read cycle time Address access time Address valid to low Z Chip-select access time CS low to low Z CS high to high Z CS low to power up CS high to power down Output enable access time OE low to low Z OE high to high Z 65728B H-5 25 25 5 25 5 12 0 15 15 2 10 65728B K-5 35 35 5 35 5 15 0 20 15 0 15 65728B M-5 45 45 5 45 5 20 0 25 20 0 15 65728B N-5 55 55 5 55 5 20 0 25 25 0 20 UNIT ns ns ns ns ns ns ns ns ns ns ns VALUE min max min max min max min max max min max Read Cycle : Military (-2) Automotive (-A) Industrial (-9) Specification SYMBOL TAVAV TAVQV TAVQX TELQV TELQX TEHQZ TELIC TEHICL TGLQV TGLQX TGHQZ PARAMETER Read cycle time Address access time Address valid to low Z Chip-select access time CS low to low Z CS high to high Z CS low to power up CS high to power down Output enable access time OE low to low Z OE high to high Z 65728B H-2 25 25 5 25 5 12 0 20 15 0 12 65728B K-2 35 35 5 35 5 15 0 20 15 0 15 65728B M-2 45 45 5 45 5 20 0 25 20 0 15 65728B N-2 55 55 5 55 5 20 0 25 25 0 20 UNIT ns ns ns ns ns ns ns ns ns ns ns VALUE min max min max min max min max max min max Rev. C (16/08/95) 7 HM 65728B Read Cycle nb 1 MATRA MHS Read Cycle nb 2 Ordering Information PACKAGE HM 3 DEVICE TYPE 65728B GRADE H LEVEL -5 : R 0 - Chip form 8 k x 8 high speed 1 - Ceramic 24 pins static RAM 3 - Plastic 24 pins 300 mils 3E - Plastic 24 pins 600 mils 4 - LCC 32 pins T - SOIC 24 pins 300 mils H = 25 ns K = 35 ns M = 45 ns N = 55 ns -2 -5 -6 -9 -A /883 DB R RD D : : : : : : : : : : Military Commercial 100% 25C Probe Industrial Automotive MIL STD 883 Class B or S Dice Military program Tape & Reel option Tape & Reel/Dry pack option Dry pack option The information contained herein is subject to change without notice. No responsibility is assumed by MATRA MHS SA for using this publication and/or circuits described herein : nor for any possible infringements of patents or other rights of third parties which may result from its use. 8 Rev. C (16/08/95) |
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